1. Field of Invention
The present invention relates to a method of manufacturing dynamic random access memory (DRAM). More particularly, the present invention relates to a method of manufacturing embedded DRAM.
2. Description of Related Art
Embedded DRAM is a type of integrated circuit (IC) that combines DRAM circuits and logic circuits together in a semiconductor substrate. Nowadays, the trend in manufacturing semiconductor ICs is to integrate memory cell arrays with high-speed logic circuit elements. For example, microprocessors or digital signal processors all have integrated circuits that incorporate embedded memory.
At present, semiconductor manufacturers are striving to increase functionality of the devices while maintaining or lowering their production cost. By miniaturizing and fabricating sub-micron semiconductor devices, the goals of increased functionality and reduced production cost are partially met. Sub-micron technology reduces device function degradation and parasitic capacitance, and hence is capable of improving device functionality. Furthermore, sub-micron technology produces smaller semiconductor chips. Since a small size chip function similar to a large chip, more silicon chips can be fabricated on a given size silicon wafer. Hence, the average production cost of each chip is lower.
Another route semiconductor manufacturers are taking is towards the integration of logic circuit elements with memory devices in a semiconductor chip. This has the benefit of decreasing production cost as well as improving the functional capacity of the devices. Integration improves functionality by lowering the time delay for sending signals from a memory device in one part of a semiconductor chip to a logic device in another part of another semiconductor chip. In addition, by putting memory and logic devices together on a semiconductor chip, cost of production is lowered because they can share most common fabrication procedures.
Attempts at providing a method of integrating logic circuits and memories together in a single chip have been made by various semiconductor manufacturers. For example, Dennison et al. in U.S. Pat. No. 5,292,677 has proposed a method of fabricating complementary metal oxide semiconductor (CMOS) devices and dynamic random access memory (DRAM) devices on a single semiconductor chip. However, in fabricating these two elements, the method does not share many fabrication steps, and hence is unable to significantly affect the production cost. Moreover, the method does not include the fabrication of high-efficiency logic devices.
To fabricate high-efficiency high-speed logic circuits and memory circuits together on a single semiconductor chip, a number of manufacturing aspects must be considered. Most often, consideration is directed towards either the processing of the logic circuit or the memory circuit, and both aspects are rarely considered together.
In light of the foregoing, there is a need to provide an improved method of integrating logic and memory circuits together on a single silicon chip.